The three-dimensional (3D) integration of two or more semiconductor structures may be beneficial in microelectronic applications. For example, 3D integration of microelectronic devices may result in improved electrical performance and power consumption while reducing the overall device foot print. See, for example, the publication of P. Garrou et al., 2008, entitled The Handbook of 3D Integration, Wiley-VCH.
The 3D integration of semiconductor structures may be achieved by a number of methods, including, for example, the attachment of one or more semiconductor structures to a processed semiconductor structure that comprises a plurality of device structures. The attachment of a semiconductor structure to a processed semiconductor structure may be achieved by a number of methods. Upon attaching the semiconductor structure to the processed semiconductor structure, the semiconductor structure may undergo additional processes, and may itself be used as a receiving substrate for the attachment of further semiconductor structures. It should be noted that the 3D integration of semiconductor structures may take place by the attachment of a semiconductor die to one or more additional semiconductor dies (i.e., die-to-die (D2D)), a semiconductor die to one or more semiconductor wafers (i.e., die-to-wafer (D2W)), as well as a semiconductor wafer to one or more additional semiconductor wafers (i.e., wafer-to-wafer (W2W)), or a combination thereof.
However, the smoothness and the planarity of each of the structures to be attached to one another, e.g., the attachment surfaces of the processed semiconductor structure and the semiconductor structures may have an affect on the quality of the completed 3D integrated semiconductor structure. For example, when the 3D integration of a structure comprises a processed semiconductor structure in which semiconductor devices have been formed, the processes used to form the semiconductor devices may result in rough non-planar surfaces. Subsequent attachment of a semiconductor structure to a rough non-planar surface of the processed semiconductor structure may result in poor adhesion between the semiconductor structure and the processed semiconductor structure, which may result in an undesirable separation of the semiconductor structure from the processed semiconductor structure during subsequent processes.